1. Field of the Invention
The present invention relates to a liquid crystal display device for displaying images and characters using liquid crystal and a method for manufacturing the same.
2. Description of the Related Art
There are known active matrix type display devices as an above-mentioned type liquid crystal display device, in which switching elements such as thin film transistors (hereinafter referred to as xe2x80x9cTFTsxe2x80x9d) are provided on one of a pair of substrates disposed so as to confront each other with a liquid crystal layer between to apply an electric field to each pixel.
FIG. 12 is a schematic diagram of a configuration of an active matrix substrate 1 which is one of substrates of a liquid crystal display device using TFTs. In the liquid crystal display device are formed TFTs 2 of switching elements and pixel capacities 3 in a matrix form. A plurality of gate signal lines 4 and source signal lines 5 are disposed so as to intersect each other at right angles. The gate signal lines 4 are connected to the gate electrodes of the TFTs 2 which are driven by signals inputted thereto. The source signal lines 5 are connected to the source electrodes of the TFTs 2 to input video signals thereto. Pixel electrodes 7 which are electrodes of the pixel capacities 3 at one side thereof are connected to drain electrodes 6 of the TFTs 2. Electrodes of the pixel capacities at the other side thereof are counter electrodes disposed on a counter substrate which faces the active matrix substrate 1 when the liquid crystal display device is formed.
FIG. 13 is a plan view showing a structure of the active matrix substrate 1. FIG. 14A is a sectional view taken along line A1xe2x80x94A1 in FIG. 13. FIG. 14B is a sectional view taken along line B1xe2x80x94B1 in FIG. 13. FIG. 14C is a sectional view taken along line C1xe2x80x94C1 in FIG. 13. The active matrix substrate 1 comprises gate electrodes 11, gate signal lines 4, a semiconductor layer 13, an n+-Si layer to become source electrodes 8 and drain electrodes 6, a metal layer to become source signal lines 5 and source and drain extraction electrodes 14 and 15, an interlayer insulation film 16 and a transparent conductive film (ITO: indium tin oxide) to become the pixel electrodes 7 which are sequentially formed on a transparent insulating substrate 10. The pixel electrodes 7 are connected to the drain electrodes 6 of the TFTs via through holes 21 extending through the interlayer insulation film 16 and the drain extraction electrodes 15. Gate terminals 22 and source terminals 23 are provided at the ends of the gate signal lines 4 and source signal line 5, respectively.
Since the interlayer insulation film 16 is interposed between the gate signal lines 4 and source signal lines 5 and the pixel electrodes 7, the pixel electrodes 7 can overlap upon the signal lines 4 and 5. Such a structure is disclosed in, for example, Japanese Unexamined Patent Publication JP-A 58-172685 (1983) and is known to be effective, for example, in improving a numerical aperture and suppressing poor alignment of liquid crystal by shielding an electrical field generated by the signal lines.
An example of manufacturing steps for the active matrix substrate 1.
The gate signal lines 4 and gate electrodes 11 are first fabricated on the transparent insulating substrate 10, and the gate insulation film 12 to allow the source signal lines 5 to overlap, an i-Si layer to become the semiconductor layer 13 and the n+-Si layer to become the source electrodes 8 and drain electrodes 6 are continuously formed. Subsequently, n30 -Si layer to become the source electrodes 8 and drain electrodes 6 and the semiconductor layer 13 to cause TFT operations are patterned. Masked etching is carried out to form the contact holes 20 to establish electrical contact with the gate electrodes 11 on the gate insulation film 12 in order to allow input of further signals. The steps up to this point are related to formation of the gate terminals 22 as shown in FIG. 14B.
Next, the metal layer to become the source extraction electrodes 14, the source signal lines 5 and drain extraction electrodes 15 is fabricated; the interlayer insulation film 16 is formed to insulate them from the pixel electrodes 7; and masked etching is carried out to form contact holes 24 for inputting signals to the source signal lines 5 and the through holes 21 for inputting signals to the drain extraction electrodes 15. The steps up to this point form the source terminals as shown in FIG. 14C.
Finally, the transparent conductive film to become the pixel electrodes 7 is formed to form the section as shown in FIG. 14A. The fabrication of the active matrix substrate 1 is thus completed.
The recent trend toward larger and high resolution liquid crystal display devices has resulted in demands for wiring with low resistance metallic material. Aluminum films or aluminum alloy films primarily constituted by aluminum have come to attention as low resistance metal wiring materials because they are relatively inexpensive and are easy to form. Another pressing need is to reduce manufacturing steps in order to fabricate liquid crystal displays with high quality at low cost to achieve price reduction.
The above-described method for manufacturing the active matrix substrate 1 for the liquid crystal display device requires two masked etching steps, i.e., the step of performing masked etching on the gate insulation film 12 to form the contact holes 20 in order to form the gate terminals 22 and the step of performing masked etching on the interlayer insulation film 16 to form the contact holes 24 for the source terminals 23 and the through holes 21 for connecting the pixel electrodes 7. On the contrary, the number of times of the masked etching can be reduced to one, for example, by performing the step of forming the contact holes 20 in the gate insulation film 12 and the step of forming the contact holes 23 and through holes 21 in the interlayer insulation film simultaneously to fabricate a liquid crystal display device at a low cost. For example, such a method of manufacture is disclosed in Japanese Unexamined Patent Publication JP-A 9-73100 (1997). According to this publication, the number of steps can be reduced by using a metal film as an etching stopper layer to provide selectivity during the etching of an insulation film. Aluminum, titanium, chromium and alloys of them are named as metals having such a function.
It is possible to propose a method in which an aluminum film or an aluminum alloy film primarily made of aluminum, which serves also as a low resistance metal film, is formed on the drain extraction electrodes 15, for example, simultaneously performing the step of forming the contact holes 20 in the gate insulation film 12 and the step of forming the contact holes 24 and through holes 21 in the interlayer insulation film 16, as proposed in Japanese Unexamined Patent Publication JP-A 9-73100 (1997).
However, since the aluminum film or aluminum alloy film primarily made of aluminum which serves as an etch stopper layer and a low resistance metal film can not contact the transparent conductive film (ITO) as the pixel electrodes 7, the low resistance metal film on the drain extraction electrodes 15 which face the through holes 21 must be removed by means of wet etching after the through holes 21 are formed. However, since wet etching is anisotropic etching, side etching (over-etching) occurs under the interlayer insulation film 16 as shown in FIG. 15, which results in the formation of a step 25. As shown in FIG. 13, since the bottom of the through hole 21 is formed smaller than the end of the drain extraction electrode 15 such that the drain extraction electrode 15 is exposed on the entire area of the bottom, a side etch region 26 as a result of the wet etching is formed along the entire circumference of the bottom of the through hole 21. When the transparent conductive film to become the pixel electrodes 7 is formed on the step 25 formed as a result of etch shift attributable to the side etch region 26, disconnection may occur at the step 25 as shown in FIG. 16. Since the step 25 is formed along the entire circumference of the bottom of the through hole 21 as described above, disconnection can occur along the entire circumference. In this case, poor contact occurs between the transparent conductive film and the drain extraction electrodes 15.
A description will now be made on a second conventional active matrix substrate 30 having auxiliary capacities. FIG. 17 is a plan view showing a structure of the active matrix substrate 30. FIG. 18A is a sectional view taken along line A2xe2x80x94A2 in FIG. 17. FIG. 18B is a sectional view taken along line B2xe2x80x94B2 in FIG. 17. FIG. 18C is a sectional view taken along line C2xe2x80x94C2 in FIG. 17. FIG. 18D is a sectional view taken along line D2xe2x80x94D2 in FIG. 17. Parts corresponding to parts of the active matrix substrate 1 shown in FIGS. 13 and 14A through 14C are indicated by the same reference numbers.
The active matrix substrate 30 comprises gate signal lines 4 and gate electrodes 11 connected to the gate signal lines 4 formed on a transparent insulating substrate 10. Auxiliary capacity signal lines 25 are formed in parallel with the gate signal lines 4 as shown in FIG. 17, and a gate insulation film 32 is formed to cover them. A semiconductor layer 13 is formed such that it overlaps the gate electrodes 11, and an n+-Si layer to become source electrodes 8 and drain electrodes 6 are formed to cover a part of the semiconductor layer 13. Source extraction electrodes 14 connected to the source electrodes 8 are formed by patterning a metal film along with source signal lines 5. The metal film located over the drain electrodes 6 is formed with drain extraction electrodes 15 which are connected to the drain electrodes at one end thereof and which constitute auxiliary capacities at the other end thereof. Auxiliary capacities 27 of the drain extraction electrodes 15 are provided over auxiliary capacity signal lines 25, and auxiliary capacities are formed in regions where auxiliary capacity portions 27, gate insulation film 32 and auxiliary capacity signal lines 25 overlap.
Further, an interlayer insulation film 16 in a two-layer structure is formed to cover TFTs 2, the gate signal lines 4 and source signal lines 5. A first layer 16a of the interlayer insulation film 16 is made of silicon nitride which serves as an inorganic insulation film, and a second layer 16b on the first layer 16a is an organic insulation film. A transparent conductive film to become pixel electrodes 7 is formed on the interlayer insulation film 16 in a two-layer structure. The pixel electrodes 7 are connected to the auxiliary capacity portions 27 of the drain extraction electrodes 15 via through holes 28 that extend through the interlayer insulation film 16. Such a structure is disclosed in, for example, Japanese Unexamined Patent Publication JP-A 9-325330 (1997) and is known to be effective, for example, in improving a numerical aperture and suppressing poor alignment of liquid crystal by shielding an electrical field generated by the signal lines because the interlayer insulation film 16 having a two-layer structure make it possible to form large pixel electrodes 7.
Like the active matrix substrate 1 according to the first prior technique described above, wiring utilizing a low resistance metallic material can be provided in such an active matrix substrate 30 having auxiliary capacities according to the second prior technique by forming an aluminum film or an aluminum alloy film primarily made of aluminum on the drain extraction electrodes 15. As in the first prior technique, the transparent conductive film to become the pixel electrodes 7 is formed after removing a low resistance metal film exposed at the bottom of through holes 28 after the formation of the through holes 28 by means of wet etching. In this case, steps are formed again by side etching as a result of the wet etching, which can cause breakage of the transparent conductive film along the entire circumference of the bottoms of the through holes 28 and can consequently cause poor contact between the transparent conductive film and the drain extraction electrodes.
Further, for example, Japanese Unexamined Patent Publication JP-A 9-5788 (1997) discloses another prior art constitution in which in order to establish conduction between conductive electrodes on upper and lower layers through a contact hole, the angle defined by the side wall and the bottom of the contact hole is made equal to or smaller than 75 degrees. Such a constitution is also unable to prevent disconnection attributable to side etching as described above.
It is an object of the invention to provide a liquid crystal display device in which wiring with a low resistance metallic material is used and in which pixel electrodes and drain extraction electrodes can be reliably connected and a method for manufacturing the same.
According to the invention, there is provided a method for manufacturing a liquid crystal display device in which a plurality of switching elements are disposed in a matrix form on a substrate; a plurality of gate signal lines for controlling respective switching elements and a plurality of source signal lines for supplying data signals to respective switching elements are disposed perpendicularly to each other; an interlayer insulation film are formed to cover the switching elements, gate signal lines and source signal lines; and liquid crystal is encapsulated between an active matrix substrate in which a plurality of pixel electrodes are formed on the interlayer insulation film which pixel electrodes are connected to drain electrodes of respective switching elements and a counter substrate confronting the active matrix substrate, the method comprising the steps of:
forming a low resistance metal film on drain extraction electrodes connected to the drain electrodes at one end thereof;
forming an interlayer insulation film to cover the switching elements, gate signal lines, source signal lines and drain extraction electrodes;
forming through holes in the interlayer insulation film to expose at least part of the periphery of the extraction electrodes at the other end thereof;
performing wet etching to remove the low resistance metal film on the drain extraction electrodes exposed in the through holes; and
forming pixel electrodes extending from the drain extraction electrodes from which the low resistance metal film has been removed, to the interlayer insulation film.
According to the present invention, since the low resistance metal film is formed on the drain extraction electrodes to become resistive wiring, it is possible to provide a liquid crystal display device which has a large screen or which can be driven by a low voltage. The through holes are formed in the interlayer insulation film such that at least a part of the periphery of the drain extraction electrodes at the other end thereof is exposed. That is, a through hole is formed such that its coverage includes a region where an extraction electrode exists and a region where no extraction electrode exists. While a step is formed at an extraction electrode at the bottom of a through hole as a result of side etching which is characteristic of wet etching when the low resistance metal film on the extraction electrode is removed, the step is not formed along the entire circumference of the bottom of the through hole because the extraction electrode is not present in some region at the bottom of the through hole. Therefore, when the pixel electrodes are formed such that they extend from the interlayer insulation film down to the drain extraction electrodes in the through holes, the pixel electrodes and extraction electrodes can be reliably connected because no disconnection occurs in regions where no extraction electrode is formed even if disconnection occurs in regions where the extraction electrodes are formed. This makes it possible to reduce defective connection to thereby improve yield and reduce manufacturing cost.
In the invention, it is preferable that gate terminals are provided at the ends of the gate signal lines to establish electrical contact with gate electrodes of the switching elements; a low resistance metal film is formed on the gate signal lines at the step of forming a low resistance metal film; contact holes are formed in the interlayer insulation film to expose at least a part of the periphery of the gate signal lines at an end thereof at the step of forming through holes; the low resistance metal film on the gate signal lines exposed in the contact holes is removed through wet etching at the step of wet etching; and a conductive film is formed such that it extends from the interlayer insulation film at the periphery of the contact holes on to the inner circumference of the contact holes at the step of forming the pixel electrodes.
According to the invention, since the conductive film is formed such that it extends from the interlayer insulation film at the periphery of the contact holes on to the inner circumference of the contact holes, redundancy can be given to the wiring to the gate terminals. Since the contact holes are formed simultaneously with the formation of the through holes, a reduction in the number of manufacturing steps can be achieved to allow a cost reduction. Further, since the contact holes are formed to expose at least a part of the periphery of the gate signal lines at the ends thereof, breakage of the conductive film can be reliably prevented to improve the yield and to thereby reduce the manufacturing cost. In addition, the use of a low resistance metal film makes it possible to provide a liquid crystal display device which has a large screen or which can be driven by a low voltage.
In the invention it is preferable that source terminals for inputting signals to source terminals of the switching elements are provided at the ends of the source signal lines; a low resistance metal film is formed on the source signal lines at the step of forming a low resistance metal film; contact holes are formed in the interlayer insulation film to expose at least a part of the periphery of the source signal lines at an end thereof at the step of forming through holes; the low resistance metal film on the source signal lines exposed in the contact holes is removed through wet etching at the step of wet etching; and a conductive film is formed such that it extends from the interlayer insulation film at the periphery of the contact holes on to the inner circumference of the contact holes at the step of forming the pixel electrodes.
According to the invention, since the conductive film is formed such that it extends from the interlayer insulation film at the periphery of the contact holes on to the inner circumference of the contact holes, redundancy can be given to the wiring to the source terminals. In addition, since the low resistance metal film is formed on the source electrodes, it is possible to provide a liquid crystal display device which has a large screen or which can be driven by a low voltage. Sine the contact holes are formed to expose at least a part of the periphery of the source signal lines at the ends thereof, the breakage of the conductive film can be reliably prevented to improve the yield and to thereby reduce the manufacturing cost.
The present invention is characterized in that notches are formed at the other ends of the drain extraction electrodes and in that the through holes are formed in the interlayer insulation film such that the bottoms of the through holes extend across the notches at the other ends of the drain extraction electrodes.
According to the invention, since the through holes are formed such that the bottoms thereof extend across the notches of the drain extraction electrodes, the bottoms of the through holes are formed to cover regions where the drain extraction electrodes exist and regions where no drain extraction electrode exists. This makes it possible to prevent the disconnection of the pixel electrodes reliably. Thus, the formation of notches at the drain extraction electrodes makes it possible to prevent disconnection without changing the shape of the through holes.
According to the invention, there is provided a liquid crystal display device comprising a plurality of switching elements disposed in a matrix form on a substrate; a plurality of gate signal lines for controlling respective switching elements and a plurality of source signal lines for supplying data signals to respective switching elements disposed perpendicularly to each other; an interlayer insulation film formed to cover the switching elements, gate signal lines and source signal lines; and liquid crystal encapsulated between an active matrix substrate in which a plurality of pixel electrodes are formed on the interlayer insulation film which pixel electrodes are connected to drain electrodes of respective switching elements, and a counter substrate confronting the active matrix substrate,
wherein in the active matrix substrate are formed:
a low resistance metal film on drain extraction electrodes connected to the drain electrodes at one end thereof;
an interlayer insulation film to cover the switching elements, gate signal lines, source signal lines and drain extraction electrodes;
through holes in the interlayer insulation film so that at least part of the periphery of the extraction electrodes at the other end thereof is exposed; and
pixel electrodes formed so as to extend from the drain extraction electrodes from which the low resistance metal film is removed by wet etching, on to the interlayer insulation film.
According to the present invention, since the through such that at least a part of the periphery of the extraction electrodes at the other ends thereof is exposed, side etching does not occur at the regions of the periphery of the drain extraction electrodes exposed in the through holes even when steps are formed as a result of side etching during wet etching to remove the metal film, which makes it possible to connect the pixel electrodes and extraction electrodes reliably. It is therefore possible to improve the yield and reduce the manufacturing cost.